commit 31ebc4bf49bc204657605429ea5a6523482fa3f4
parent 971d100ee6292c0e4688019fe1ede1adbf46aa1c
Author: Christian Ermann <christianermann@gmail.com>
Date: Sun, 24 Nov 2024 11:34:19 -0800
Prototype interactive debugger for exceptions
Diffstat:
4 files changed, 192 insertions(+), 4 deletions(-)
diff --git a/Makefile b/Makefile
@@ -1,7 +1,7 @@
CC := riscv64-unknown-elf-gcc
CPPFLAGS := -x assembler-with-cpp
-CFLAGS := -Wall -ggdb -mcmodel=medany -march=rv32im -mabi=ilp32
+CFLAGS := -Wall -ggdb -mcmodel=medany -march=rv32imzicsr -mabi=ilp32
LDFLAGS := -static -nostartfiles
SRC_DIR := src
diff --git a/src/forth.s b/src/forth.s
@@ -622,6 +622,14 @@ _branch_done:
addi ra, ra, cell
next
+defword "debug>", debug_prompt, 0xCCE21C52
+ push w
+ la w, _debug_prompt
+ la x, _debug_prompt_len
+ jal uart_put_string
+ pop w
+ exit
+
defcode "prompt", prompt, 0xDFE6493B
push w
la w, _prompt
@@ -653,9 +661,22 @@ defword "quit", quit, 0x47878736
jal branch
.int quit
-defword "abort", abort, 0xA52BCAF9
- jal sp_top
- jal sp_store
+defword "debug", debug, 0x5864ED98
+ jal debug_prompt
+ jal refill
+ jal drop
+ jal interpret
+ jal okay
+ j debug
+
+defcode "resume", resume, 0xFF39A36A
+ la w, abort
+ pop_ret zero
+ next
+
+defcode "abort", abort, 0xA52BCAF9
+ la psp, __stacktop
+ li w, 0xDEADC0DE
jal quit
# -----------------------------------------------------------------------------
@@ -1392,6 +1413,10 @@ _prompt:
.ascii "> "
_prompt_len = (. - _prompt)
+_debug_prompt:
+ .ascii "debug> "
+_debug_prompt_len = (. - _debug_prompt)
+
_okay:
.ascii "ok\n"
_okay_len = (. - _okay)
@@ -1407,7 +1432,14 @@ _fib_len: .int 255
.section ".text.boot"
.globl start
+.balign cell
start:
+ la w, __stacktop_trap
+ csrrw w, mscratch, w
+
+ la w, trap_table + 1
+ csrw mtvec, w
+
la psp, __stacktop
la rsp, __stacktop_ret
la ip, program
diff --git a/src/riscv32-virt.ld b/src/riscv32-virt.ld
@@ -15,6 +15,8 @@ SECTIONS {
__stacksize = 256;
__stacktop = ORIGIN(RAM) + LENGTH(RAM);
__stacktop_ret = __stacktop - __stacksize;
+ __stacktop_trap = __stacktop_ret - __stacksize;
+ __stacktop_trap_ret = __stacktop_trap - __stacksize;
. = ORIGIN(RAM);
.text : { *(.text.boot); *(.text); *(.text.*) } >RAM
diff --git a/src/trap.s b/src/trap.s
@@ -0,0 +1,154 @@
+.altmacro
+
+.global trap_table
+.weak trap_s_software_interrupt
+.weak trap_m_software_interrupt
+.weak trap_s_timer_interrupt
+.weak trap_m_timer_interrupt
+.weak trap_s_external_interrupt
+.weak trap_m_external_interrupt
+
+#define w a0
+#define x a1
+#define y a2
+#define psp sp
+#define rsp s2
+
+trap_exception:
+ csrr t0, mscratch
+ sw w, 0*4(t0)
+ sw x, 1*4(t0)
+ sw y, 2*4(t0)
+ sw psp, 3*4(t0)
+ sw rsp, 4*4(t0)
+ csrw mscratch, t0
+
+ mv psp, t0
+ addi rsp, psp, -256
+
+ la w, _exception_str_table
+ csrr x, mcause
+ slli x, x, 3
+ add w, w, x
+ lw x, 0(w)
+ lw w, 4(w)
+ jal uart_put_string
+
+ lw w, 0(psp)
+ addi psp, psp, 4
+
+ jal debug
+ csrw mepc, w
+
+ csrr t0, mscratch
+ lw w, 0*4(t0)
+ lw x, 1*4(t0)
+ lw y, 2*4(t0)
+ lw psp, 3*4(t0)
+ lw rsp, 4*4(t0)
+ csrw mscratch, t0
+
+ mret
+
+.balign 4
+trap_table:
+ jal trap_exception
+ jal trap_s_software_interrupt
+ .int 0
+ jal trap_m_software_interrupt
+ .int 0
+ jal trap_s_timer_interrupt
+ .int 0
+ jal trap_m_timer_interrupt
+ .int 0
+ jal trap_s_external_interrupt
+ .int 0
+ jal trap_m_external_interrupt
+
+trap_s_software_interrupt:
+trap_m_software_interrupt:
+trap_s_timer_interrupt:
+trap_m_timer_interrupt:
+trap_s_external_interrupt:
+trap_m_external_interrupt:
+trap_interrupt:
+ mret
+
+.section ".rodata"
+_exception_0_str:
+ .ascii "instruction address misaligned\n"
+_exception_0_len = (. - _exception_0_str)
+_exception_1_str:
+ .ascii "instruction access fault\n"
+_exception_1_len = (. - _exception_1_str)
+_exception_2_str:
+ .ascii "illegal instruction\n"
+_exception_2_len = (. - _exception_2_str)
+_exception_3_str:
+ .ascii "breakpoint\n"
+_exception_3_len = (. - _exception_3_str)
+_exception_4_str:
+ .ascii "load address misaligned\n"
+_exception_4_len = (. - _exception_4_str)
+_exception_5_str:
+ .ascii "load access fault\n"
+_exception_5_len = (. - _exception_5_str)
+_exception_6_str:
+ .ascii "store/amo address misaligned\n"
+_exception_6_len = (. - _exception_6_str)
+_exception_7_str:
+ .ascii "store/amo access fault\n"
+_exception_7_len = (. - _exception_7_str)
+_exception_8_str:
+ .ascii "environment call from u-mode\n"
+_exception_8_len = (. - _exception_8_str)
+_exception_9_str:
+ .ascii "environment call from s-mode\n"
+_exception_9_len = (. - _exception_9_str)
+_exception_11_str:
+ .ascii "environment call from m-mode\n"
+_exception_11_len = (. - _exception_11_str)
+_exception_12_str:
+ .ascii "instruction page fault\n"
+_exception_12_len = (. - _exception_12_str)
+_exception_13_str:
+ .ascii "load page fault\n"
+_exception_13_len = (. - _exception_13_str)
+_exception_15_str:
+ .ascii "store/amo page fault\n"
+_exception_15_len = (. - _exception_15_str)
+_exception_16_str:
+ .ascii "double trap\n"
+_exception_16_len = (. - _exception_16_str)
+_exception_18_str:
+ .ascii "software check\n"
+_exception_18_len = (. - _exception_18_str)
+_exception_19_str:
+ .ascii "hardware error\n"
+_exception_19_len = (. - _exception_19_str)
+_exception_reserved_str:
+ .ascii "reserved\n"
+_exception_reserved_len = (. - _exception_reserved_str)
+
+_exception_str_table:
+ .int _exception_0_len, _exception_0_str
+ .int _exception_1_len, _exception_1_str
+ .int _exception_2_len, _exception_2_str
+ .int _exception_3_len, _exception_3_str
+ .int _exception_4_len, _exception_4_str
+ .int _exception_5_len, _exception_5_str
+ .int _exception_6_len, _exception_6_str
+ .int _exception_7_len, _exception_7_str
+ .int _exception_8_len, _exception_8_str
+ .int _exception_9_len, _exception_9_str
+ .int _exception_reserved_len, _exception_reserved_str
+ .int _exception_11_len, _exception_11_str
+ .int _exception_12_len, _exception_12_str
+ .int _exception_13_len, _exception_13_str
+ .int _exception_reserved_len, _exception_reserved_str
+ .int _exception_15_len, _exception_15_str
+ .int _exception_16_len, _exception_16_str
+ .int _exception_reserved_len, _exception_reserved_str
+ .int _exception_18_len, _exception_18_str
+ .int _exception_19_len, _exception_19_str
+
